NPTEL Digital System Design Week 12 Assignment Answers 2025
1. What is the primary purpose of an FPGA?
- To permanently implement a specific digital circuit.
- To allow reconfigurable hardware designs after manufacturing.
- To replace microcontrollers in all applications.
- To serve as fixed-purpose processors.
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2. Which of the following is a key component of an FPGA’s internal architecture?
- Arithmetic Logic Units (ALUs).
- Configurable Logic Blocks (CLBs).
- Instruction pipelines.
- Fixed digital circuits.
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3. Which of the following is an example of a fixed unit in an FPGA?
- Flip-flops in CLBs.
- Hardwired DSP blocks.
- LUTs in the FPGA fabric.
- Programmable interconnects.
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4. How is an FPGA configured?
- By hardcoding the design directly into the hardware.
- Using HDL (Hardware Description Language) and downloading a bitstream.
- By soldering additional components onto the board.
- Through a one-time programming process during manufacturing.
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5. What would be the input to the Design Synthesis stage in FPGA design flow?
- Functional testing
- Output of design synthesis, and FPGA part number
- Bitstream Data
- HDL Specification
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6. What would be the input to the Physical Design stage in FPGA design flow?
- Functional testing
- HDL Specification
- Bitstream Data
- Output of design synthesis and FPGA part number
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7. Which of the following technologies is preferred when we need to quickly make a prototype for a specified problem?
- ASIC
- FPGA
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8. Why are ASICs generally not cost-effective for low-volume production?
- They require expensive programming software.
- They have a high one-time development cost.
- They cannot be reused after manufacturing.
- They are slower compared to FPGAs.
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9. What is the primary function of the connection box in an FPGA?
- To implement logical functions in CLBs
- To connect inputs and outputs of CLBs to interconnection channels
- To program the logic blocks
- To store configuration data
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10. In an FPGA, the switch box is used to:
- Program the logic blocks
- Enable clock signals to the CLBs
- Store memory cells
- Connect vertical interconnection channels to horizontal interconnection channels
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